The present invention relates to a multilayer circuit substrate with a circuit repairing function, a circuit repairing method for the substrate, and an electronic circuit device with electronic parts mounted to the circuit substrate.
In electronic circuit devices which are mounted with many LSIs which can be operated rapidly and highly integrated, the high density packaging technology on each circuit substrate is very important. By realizing high density packaging, the length of each circuit line between LSIs can be shortened, and the intra-substrate pattern delay time of an electric signal can be shortened, and high speed operations as an electronic circuit device can be realized.
One of the high density packaging technologies is a flip chip packaging method, for example, for forming a metal bump such as solder on the electrode on the surface of an LSI chip and for bonding the above chip onto the circuit substrate with face down via the bump.
By high integration of LSIs, the number of I/O terminals of each LSI chip increases and the number of signal lines in the circuit substrate also increases, so that it is necessary to realize a multilayered circuit substrate for mounting LSIs. Therefore, to produce circuit substrates, a technology for forming fine multi-point electrode terminals and a technology for patterning multilayer circuits are required.
Such a multilayer circuit substrate requires repairing of faulty parts of the fine pattern manufacturing process or repairing of the circuit so as to change the logic between LSIs after they are mounted to the substrate. Concretely, it is required to change the circuit, for example, due to the problems indicated below.
(1) Faulty design of the circuit PA1 (2) Faulty manufacture PA1 (3) Faulty LSI operations due to the signal propagation delay time generated on a circuit line or defects of the circuit pattern PA1 (4) Design changes for improving the performance of the electronic circuit device
Therefore, the multilayer circuit substrate requires a repair pattern structure for changing the circuit which will not reduce the packaging density and LSI operation performance, and various structures have been proposed.
For example, as one of the means, a method for changing the circuit by installing a repair pattern bonding pad or engineering change (EC) pad near the projection surface of electronic circuit parts mounted on a multilayer circuit substrate and by wire-bonding the pad is well known.
However, this means installs a repairing pad on the surface oE the circuit substrate, so that the electronic circuit part mounting density (total area of the mounted electronic circuit parts/area of the circuit substrate) for the circuit substrate reduces remarkably. Repairing methods relating to this type of technology are indicated in, for example, Japanese Patent Laid-Open No. 62-25437 and Microelectronics Packaging Handbook (p. 39, FIGS. 1 to 28, Nikkei BP, Mar. 27, 1991).
As a means for improving this mounting density, a method for improving the pad structure installed on the circuit substrate so as to reduce the occupied area of the repairing pad is proposed. According to this method, (1) as pads for bonding the electronic part terminals installed on the surface layer of the substrate, a cutting pad in repairing and a repair pattern bonding pad are installed, and an intra-substrate circuit pattern bonded via this cutting pad in repairing and a repair pattern which is bonded to the repair pattern bonding pad for repairing are installed on the inner layer of the substrate, and the cutting pad in repairing bonded to the terminal bonding pad installed on the surface layer is separated from the terminal bonding pad on the one hand for repairing and a special via hole, or simply "via" is installed between the repair pattern bonding pad bonded to the terminal bonding pad on the surface layer and the repair pattern installed on the inner layer on the other hand so as to bond the two. Furthermore, (2) the above repair pattern is installed in the substrate as a two-layer structure and a conductive via hole, formed for channel change indicating the conductive through hole location for channel change, is installed at the location where via connection between these two layers is possible on the surface layer as a repair pattern bonding pad mentioned above. A repairing method relating to this type of technology is indicated in, for example, Japanese Patent Laid-Open No. 63-213399.
The latter repairing method is superior to the former repairing method in the respect that the occupied area of a repairing pad installed on the circuit substrate can be reduced. However, since the cutting pad in repairing, which is separated from the terminal bonding pad for repairing, and the repair pattern bonding pad still exist on the substrate, the following problems are imposed.
(1) Since the cutting pad in repairing and repair pattern bonding pad are installed on the surface of the multilayer circuit substrate as repairing pads in addition to the terminal bonding pad, the electronic circuit part mounting density for the circuit substrate is still low and not sufficiently high for high density packaging.
(2) When a design change or faulty LSI operation is caused after an LSI chip is mounted on the multilayer circuit substrate by the flip chip packaging method, it is necessary to remove the LSI chip and remount a new LSI chip. This is generally referred to as repair. In this case, surplus solder remains on the terminal bonding pad on the substrate after the unnecessary LSI chip is removed, so that the leveling process (surplus solder on the terminal bonding pad is removed by a metal plate which is wettable with solder, for example, a Cu plate) is generally necessary.
However, since the above prior art uses a cutting pad in repairing and repair pattern bonding pad as terminal bonding pads, the following problems are caused in the leveling process by repair. Surplus solder which is wetted with the Cu plate 1! spreads to the cutting pad in repairing in the wetting state and bonds the cutting pad in repairing, which is separated from the terminal bonding pad, to the terminal bonding pad once again, 2! spreads to the repair pattern bonding pad in the wetting state, causes the repair pattern bonding location to be hardly recognized, and reduces the efficiency of the via hole boring process using a laser beam simultaneously, and 3! bores via holes by a laser beam using the repair pattern bonding location and conductive through hole location for channel change, which are set on the surface layer of the substrate, as reference points so as to electrically bond the repair pattern bonding pad on the surface layer of the substrate and the repair pattern which is set on the inner layer of the substrate as a two-layer structure which form a circuit pattern repairing path. However, positioning of the above via holes requires positioning accuracy of three layers in total including the pad on the surface layer of the substrate and the repair pattern on the inner layer. Therefore, when the multilayer circuit substrate increases in size, the positioning accuracy is easily affected by the warp and degree of shrinkage of the substrate and the pattern mask positioning accuracy on each layer and it is difficult to bore highly accurate via holes.